Synopsys Inc. announced the new DesignWare® Smart Data Fusion IP Subsystem, an integrated, pre-verified hardware and software IP product optimized for highly efficient DSP performance and ultra-low energy consumption. The Smart Data Fusion IP Subsystem offers a choice of DesignWare ARC® EM DSP processors, including the latest EM9D and EM11D cores with support for XY memory to boost signal processing performance. An integrated microDMA controller minimizes system-level energy consumption by enabling data transfers while the processor is in one of several programmable sleep modes.

The integrated peripherals, memories, hardware accelerators and software DSP functions deliver the performance efficiency needed for common processing tasks in Internet-of-Things (IoT) applications such as always-on sensor fusion, voice and image detection and audio playback. The DesignWare Smart Data Fusion IP Subsystem is designed to process data from numerous digital and analog sensors with minimal power consumption, offloading the host processor and enabling more efficient processing of sensor data. The fully configurable IP subsystem includes an ARC EM5D, EM7D, EM9D or EM11D processor.

This family of power-efficient cores combines RISC and DSP processing and includes support for XY memory banks to enable a sustained throughput of one 32x32 MAC operation (or two 16x16 MAC operations) per clock cycle. The additional signal processing bandwidth is optimized to manage the extensive data processing required by advanced sensor fusion algorithms and to improve processing efficiency for a range of audio formats including MP3, SBC, OPUS and AAC LC. The subsystem's integrated microDMA controller enables memory and peripheral access during processor sleep modes and provides 4X faster access times compared to traditional bus-based DMA implementations.

In addition, the subsystem incorporates highly-optimized I/O peripherals including multiple SPI, I2C and analog-to-digital converter interfaces, further lowering gate count and energy consumption while reducing engineering effort. To ease software development, the subsystem includes software drivers and a rich library of off-the-shelf DSP functions supporting filtering, correlation, matrix/vector, decimation/interpolation and complex math operations. Designers can implement these sensor-specific DSP functions in hardware using a combination of native DSP processor instructions and tightly coupled hardware accelerators to boost performance efficiency and reduce power consumption.

The subsystem is supported by commercially available software covering a range of IoT functionality, including speech recognition, voice control, motion sensing and audio post-processing and playback. Additionally, Synopsys'embARC Open Software Platform gives software developers online access to a comprehensive suite of free and open-source software that accelerates code development for the subsystem. The DesignWare Smart Data Fusion IP Subsystem will be available in February 2016.