Samsung Electronics Co., Ltd. announced that has started mass production of its 2nd-generation 8-gigabyte High Bandwidth Memory-2 with the fastest data transmission speed on the market. The new solution, Aquabolt, first HBM2 to deliver a 2.4 gigabits-per-second data transfer speed per pin, should accelerate the expansion of supercomputing and the graphics card market. The company’s new 8 gigabyte High Bandwidth Memory 2 delivers the highest level of DRAM performance, featuring a 2.4 gigabytes-per-second pin speed at 1.2V, which translates into a performance upgrade of nearly 50% per each package, compared to the company’s 1st-generation 8-gigabyte HBM2 package with its 1.6 gigabits-per-second pin speed at 1.2V and 2.0 gigabytes-per-second at 1.35V. With these improvements, a single the company 8 gigabyte High Bandwidth Memory 2 package will offer a 307 gigabytes-per-second data bandwidth, achieving 9.6 times faster data transmission than an 8 gigabit GDDR5 chip, which provides a 32 gigabytes-per-second data bandwidth. Using four of the new High Bandwidth Memory 2 packages in a system will enable a 1.2 terabytes-per-second bandwidth, which will improve overall system performance by as much as 50%, compared to a system that uses a 1.6 gigabytes-per second HBM2. The company’s new Aquabolt significantly extends the company’s leadership in driving the growth of the premium DRAM market. Moreover, the company will continue to offer leading-edge HBM2 solutions, to succeed its 1st-generation High Bandwidth Memory 2, Flarebolt, and its 2nd-generation, Aquabolt, as it further expands the market over the next several years. To achieve Aquabolt’s unprecedented performance, the company has applied new technologies related to TSV design and thermal control. A single 8 gigabyte High Bandwidth Memory 2 package consists of eight 8 gigabyte High Bandwidth Memory 2 dies, which are vertically interconnected using over 5,000 through Silicon Via’s per die. While using so many TSVs can cause collateral clock skew, the company succeeded in minimizing the skew to a very modest level and significantly enhancing chip performance in the process. In addition, the company increased the number of thermal bumps between the High Bandwidth Memory 2 dies, which enables stronger thermal control in each package. The new HBM2 includes an additional protective layer at the bottom, which increases the package’s overall physical strength. In accommodating the growing need for high-performance High Bandwidth Memory 2 DRAM, the company will supply Aquabolt to its global IT customers at a stable pace, and continue to rapidly advance its memory technology in conjunction with leading OEMs throughout a wide array of fields including supercomputing, artificial intelligence, and graphics processing.